Hall Ticket No Question Paper Code: AEC002
INSTITUTE OF AERONAUTICAL ENGINEERING
(Autonomous)
B.Tech III Semester End Examinations (Supplementary) January, 2019
Regulation: IARE R16
DIGITAL SYSTEM DESIGN
Time: 3 Hours Max Marks: 70
Answer ONE Question from each Unit
All Questions Carry Equal Marks
All parts of the question must be answered in one place only
UNIT I
1. Discuss binary system, Octal system, Decimal system, Hexa Decimal system of representation.

Given the two binary numbers X 1010100 and Y 1000011, perform the subtraction
X Y
Y X using complement and complement.
2. Convert the following binary number to Gray code
11000110
ii) 00011001
iii) 11110000
Perform the following addition using Excess-3 code
0011 0101 01102 0101 0111 10012
ii) 0101 0100 10002 0001 0010 00102
iii) 0010 0100 01112 0001 0001 00012
UNIT II
3. Find the complement of the following expressions:
xy0 x0y
ii)(AB0 C)D0 E
Convert the following expressions into sum of products:
(AB C0D)
ii) x0 x(x z0)
4. Define three input NAND gate and NOR gate with truth table.
Find the minimized product-of-sums expression for the following Boolean Function
F
P
10; 11)
P
13; 15)
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UNIT III
5. A majority function is generated in a combinational circuit when the output is equal to 1 if the
input variables have more than 0's. The output is 0 otherwise. Design a 3 input majority
function.
Show that a full-subtractor can be constructed with two half-subtractors and an OR gate.
6. Differentiate a parallel adder from serial adder. Explain a parallel adder/ subtractor using 2s
complement system with the help of a logic diagram.
Design a combinational circuit with four inputs and four outputs. The output generates the
complement of the input binary number.
UNIT IV
7. Construct a D flip-flop using T flip-flop with the help of characteristic equations.
Design a synchronous binary counter using T flip flops to count the following sequence:
000, 001, 010, 011, 100, 101, 110, 111
8. Design a synchronous BCD counter with T flip-flops.
Consider a flip-flop i.e., JK flip-flop with an inverter between the external input and the
internal input K
Obtain the characteristic equation.
ii) Obtain the excitation table.
UNIT V
9. Explain the following with an example.
i. State diagram
ii. State table
iii. State equation
Convert the following Mealy machine into corresponding Moore Machine as per given in Table 1.

Table 1
Present state Next state, Z
X=0 X=1
A 0 1
B 1 0
C 1 0
D 0 1
10. Elaborate the steps involved in the design of synchronous sequential circuits.
Design a 1011 sequence detector using T flip-flop with overlap.