M.Sc. (Semester III) (CBCS) Examination Oct/Nov-2017
Electronics
CMOS DESIGN TECHNOLOGIES
Day Date: Tuesday, 21-11-2017 Max. Marks: 70
Time: 02.30 PM to 05.00 PM
Instructions: Attempt five questions.
Q. and are compulsory.
Answer any three questions from Q.3 to Q.7.
Figures to the right indicates full marks.
Q.1 Choose the alternatives given below. 08
Guard ring are used to
Prevent latchup
Collect injected majority carriers
Collect injected minority carriers
All of these
For pseudo-nMOS inverter the gate of the p-device is connected to
VDD Ground
Output Floating
In Silicon on Insulator is used as substrate.
Sapphire Magnesium aluminate spinel
Silicon Both a b
In VLSI design, aggregates are commonly referred to as
Instance Cells
Tools Both a b
Fall time is the time for a waveform to fall from of its steady state
value.
50% to 10% 90% to 50%
90% to 10% 50% to 20%
The basic raw material used in CMOS fabrication is
Disk of silicon Water of silicon
Both a b Ingots of silicon
Absolute value of threshold voltage decreases with an in
temperature.
Decrease Increase
Constant None of these
In CMOS capacitor the dielectric material used is
100 nm SiO2 10 SiO2
10 nm SiO2 100 SiO2
State True or false. 06
Photoresist material is used as mask in fabrication process
An increase in the temperature of an MOS device result in decrease in
carrier mobility.
Voltage transfer characteristics of CMOS inverter are independent of
ratio .
Page 2 of 2
SLR-MJ-363
Static power dissipation occurs due to charging and discharging of load
capacitance.
For DC characteristics of CMOS inverter in D region n devices is in nonsaturated
region and p device is in saturated region.
In PMS design environment P stands for process.
Q.2 Attempt any two. 10
Explain Noise margin.
Write a note on circuit elements in CMOS process.
Explain power dissipation.
Derive an expression for threshold voltage. 04
Q.3 What do you mean by stick diagram? Draw a stick diagram for two input
multiplexer.
08
Describe the steps involved in silicon semiconductor technology. 06
Q.4 Explain the n-well process for fabrication of MOS device. 08
Explain pseudo n-MOS inverter. 06
Q.5 Explain the DC characteristics of CMOS inverter. 08
Write a note on Hierarchy. 06
Q.6 Describe the switching characteristics of CMOS. 08
Write a note on Y diagram. 06
Q.7 Explain the nMOS enhancement transistor in detail. 08
Write a note on Views. 06