Exam Details

Subject digital principles and system design
Paper
Exam / Course b.tech
Department
Organization SETHU INSTITUTE OF TECHNOLOGY
Position
Exam Date May, 2017
City, State tamil nadu, pulloor


Question Paper

Reg. No.
B.E. B.Tech. DEGREE EXAMINATION, MAY 2017 Second Semester Computer science and Engineering 15UCS208 DIGITAL PRINCIPLES AND SYSTEM DESIGN (Common to Information Technology) (Regulation 2015) Duration: Three hours Maximum: 100 Marks Answer ALL Questions PART A x 1 5 Marks)
1. How many bits are required to represent the decimal numbers in the range 0 to 999 using straight binary code 8 10 12 16
2. How many full adders are required to construct an m-bit parallel adder? m m-1 m+1 m+2
3. The function of a multiplexer is To decode information to select 1 out of N input data sources and to transmit it to single channel to transmit data on N lines to perform serial to parallel conversion
4. How many flip flops are required to build a binary counter circuit to count from 0 to 1023? 6 10 24 12
Question Paper Code: 50228
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5. In PAL, how 10L8 is represented 10-I/P L-Active Low Output 8 Outputs 10-I/P L-Active Low Input 8 Outputs 10-I/P L-Active Low Input Output 8 Outputs none of these PART B x 3 15 Marks)
6. Realize XOR gate using only NAND gates.
7. Obtain the truth table for BCD to Excess-3 code converter.
8. How to design 3-to-8 line decoder using 2-to-4 line decoders?
9. Define state reduction problem with example.
10. Compare asynchronous and synchronous sequential circuit.
PART C x 16 80 Marks)
11. Simplify the following Boolean function by using the Quine-McClusky Method: Or Add, subtract and multiply the following numbers in binary 101010 and 110010. Reduce the following function using K map technique:
12. Design a combinational circuit to convert gray code to binary code. Or Design a full adder and realize it using only NAND gates. Design a 2-bit magnitude comparator.
13. Implement the Boolean function using 8:1 multiplexer AB'D
Or
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Design BCD to excess 3 code converter using PAL.
14. Design MOD 8 up/down counter using flip flops with necessary diagrams and tables. Or Write short notes on shift register with neat diagram. Design MOD 6 counter circuit using J-K flip flop.
15. An asynchronous sequential circuit is described by the following excitation and output function X Draw the logic diagram of the circuit Derive the transition table and output map Describe the behavior of the circuit. Or What is the objective of state assignment in asynchronous circuit? Explain race free state assignment with an example. Discuss about static, dynamic and essential hazards in asynchronous sequential circuits.
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