Exam Details

Subject digital and pulse circuits
Paper
Exam / Course b.tech
Department
Organization Institute Of Aeronautical Engineering
Position
Exam Date July, 2018
City, State telangana, hyderabad


Question Paper

Hall Ticket No Question Paper Code: AEC019
INSTITUTE OF AERONAUTICAL ENGINEERING
(Autonomous)
B.Tech IV Semester End Examinations (Supplementary) July, 2018
Regulation: IARE R16
DIGITAL AND PULSE CIRCUITS
Time: 3 Hours Max Marks: 70
Answer ONE Question from each Unit
All Questions Carry Equal Marks
All parts of the question must be answered in one place only
UNIT I
1. State and prove De Morgan's theorem for 3 variables.
Perform the following operations
(20:6875)10
ii) (DF8:28)16 )10
iii) (2536)10 )16
2. Perform the following operation using complement method.
(10:0101)2 (101:111)2
ii) (19)10
Solve the following boolean function and represent it in minterm and maxterm canonical form.
f (XY X0Z) 0 Y Z.
UNIT II
3. Simplify the following function using Karnaugh map Y f
P
P 13; 15)
d 10; 11)
Draw the logic daigram for 2:4 decoder with an active low enable and active high data outputs.
Construct a truth table and identify the data inputs, enable input and the output. Describe the
circuit function.
4. Realize the following boolean function f
P
11; 14; 15) using logic
gates.
Perform the following to design a full subtractor
i. Construct the truth table and simplify the output equations
ii. Draw the resulting logic diagram.
UNIT III
5. What is the difference between a flip flop and a latch. Explain the operation of SR latch with a
logic diagram and excitation table.
Design a synchronous Mod-6 counter uisng D flip flop and draw its logic diagram.
Page 1 of 2
6. Explain the operation of positive edge triggered JK flip flop with neat timing diagram.
Design a 3-bit binary ripple counter using T flip flop.
UNIT IV
7. Explain the effects of feedback on output impedance for current series and input impedance for
current shunt feedback amplifier.
In a transistorized Hartely oscillator L1 0.5mH L2 0.5μH while the frequency has been
changed from 100kHz to 2000kHz. Determine the range of capacitor. Assume mutual inductance
is negligible.
8. Derive the expression for frequency of a RC phase shift oscillator and also explain its principle
of operation.
A voltage series feedback amplifier has A 100, Ri 25K
R0 10K
and feedback factor
0.1
i. Determine overall gain, input impedance and output impedance of feedback amplifier.
ii. If the gain has been reduced to what will be the feedback factor.
UNIT V
9. Draw and explain the two stage transformer coupled common emitter amplifier circuit.
In common collector configuration a transistor has the following parameters: hic 1.5
hrc
hfc hoc 50 x Rs 1.5k
and RL 2K
. Determine the current gain, voltage
gain, input impedance and output impedance.
10. Explain the operation of emitter follower circuit using darlington connection. Derive the current
gain expression of the same using small ac equivalent circuit.
Explain the effect of bypass capacitor at a low frequency response on a single stage CE amplifier.



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  • digital and pulse circuits
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  • digital ic applications using vhdl
  • digital logic design
  • digital system design
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  • discrete mathematical structures
  • dynamics of machinery
  • electrical circuits
  • electrical measurements and instrumentation
  • electrical technology
  • electromagnetic field theory
  • electromagnetic theory and transmission lines
  • electronic circuit analysis
  • electronic devices and circuits
  • elements of mechanical engineering
  • engineering chemistry
  • engineering drawing
  • engineering geology
  • engineering mechanics
  • engineering physics
  • english
  • english for communication
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  • finite element methods
  • fluid mechanics
  • fluid mechanics and hydraulics
  • fundamental of electrical and electronics engineering
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