Exam Details
Subject | hardware and software co-design | |
Paper | ||
Exam / Course | m.tech | |
Department | ||
Organization | Institute Of Aeronautical Engineering | |
Position | ||
Exam Date | February, 2017 | |
City, State | telangana, hyderabad |
Question Paper
Hall Ticket No Question Paper Code: BES204
INSTITUTE OF AERONAUTICAL ENGINEERING
(Autonomous)
M.Tech I Semester End Examinations (Regular) February, 2017
Regulation: IARE-R16
HARDWARE AND SOFTWARE CO-DESIGN
(Embedded Systems)
Time: 3 Hours Max Marks: 70
Answer ONE Question from each Unit
All Questions Carry Equal Marks
All parts of the question must be answered in one place only
UNIT I
1. In India, railway department has to control trafficin many road track intersection points. As
known, the crossing gates are normally installed on the intersection to have appropriate controls.
Such a system that is installed for train tracks from Hyderabad to Bengaluru is shown in the
figure below that comprises of the following:
i. There are two sensors Sensor_HY, Sensor_BE that will be asserted (logic high) on detection
of train on track.
ii. The gate is closed when GATE is asserted (logic high)
iii. The lights have two conditions namely red and green. When LIGHT is asserted (logic high),
the light becomes red while if it is not asserted it keeps the normal state that is green.
Figure 1
Build a state based FSM model for the controller that performs the following:
i. When no trains are detected, the gates remain open and lights are green.
ii. When train arrivals are detected, the gates must close and light is red.When a train arrives
on either side, the gate is closedfor sensor assertion. The red light is switched ON as soon
as the arrival is confirmed by sensor de-assertion on that side. When the train departs from
other side, the moment other side sensor detects the train (assertion), the lights are turned
green and gate is opened only after the sensor de-asserts (meaning a confirmation of training
going away).
Page 1 of 3
It can be assumed that is no possibility of trains to arrive in both directions and also at no
instance of time two trains will be in the section between two sensors.
The micro-controllers are available following RISC and CISC architecture. For example: 8051 is
CISC based while ARM is RISC based. Bring out three differences and substantiate the same
using the diagrams.
2. What is the need of Hardware-Software Co-synthesis? Describe one Architecture model considering
an example.
What is the fundamental difference between Vulcan and Coysma methodologies for hardware/software
partitioning? Considering COYSMA strategy, show a mathematical analysis on how we
could make an estimation of decrease in execution time. Assume the time parameters needed for
this strategy.
UNIT II
3. What is the necessity of emulation and prototyping?Brief the future developments in emulation
and prototyping of the hardware software co-design with specifications.
Explain the steps of FPGA configuration process and modes of simulation modes available.[6M]
4. List out any three techniques of component specialisation which is one of the architecture specialisation
techniques. Briefly explain them with concept and an example.
The popular microcontroller 8051 is a classic example that represents many generic microcontrollers.
Illustrate how specialisation for instruction set, data path and memory architecture are
applied in 8051 microcontroller.
UNIT III
5. What do we mean by compilation of a source code? Explain with a diagram the traditional steps
in this compilation? List down any three challenges encountered by such traditional compilation
model to embedded processors?
is considered to be most popular languages for embedded programming. However, there are
certain limitations of as an embedded system programming. List any three limitations.[6M]
6. When the programmer uses high level coding, does he/she need to understand the embedded
hardware? Substantiate your answer. What is the need of other levels of coding like mid, low
and assembly?
Which technique of source-level debugging will you try out first to debug scenarios below?
i. A function implemented returns wrong values and not as expected.
ii. The event is handled as per the needed timing on Simulator run while it very much delayed
than expected when it is run on hardware.
iii. LED is connected to GPIO but does not get switched ON as expected even though it seems
the code looks fine when walked through.
UNIT IV
7. Consider a TV system that is remote controlled wirelessly by two different remote controllers
One via Infra-Red remote that is normally used by layman while the second remote
control from Android phone used by tech-savvy person that works via WiFi?For eg: Volume
increase/decrease can be done from either Android phone or IR remote.Introduce concurrency
and comment about the need of following concurrent computation for this scenario of processing
user events:
Page 2 of 3
i. non-determinant
ii. simultaneity
iii. multiprocessing?
Bring out proper rationale.
Explain the need of co-ordinating concurrent computation or process with a practical example
and how the implementation of the same is achieved with one approach?
8. There are two processes running on embedded systems. One process ProcessRead reads the
sensors via Analog to Digital Converter of processor while another process ProcessMain is responsible
for other functionalities of system with one of the functions to processes the sensor
values and takes necessary actions. Propose possible mechanisms of sharing sensor data between
ProcessRead and ProcessMain and make a recommendation of one mechanism reasoning it out.
If there is an interface for copying source string pointed by source to destination string pointed by
destination with a return to character array, how do you verify the interface static and safety?
The interface in will be:
char* strcpy(char* destination, const char* source);
UNIT V
9. Explain the scheme of homogeneous and heterogeneous specifications for system level specifications.
Also bring out the key issues with each of these schemes to provide insights into these
schemes.
Below is the program that finds the greatest number among b and c. Draw the control flow
graph that is considered to be language oriented intermediate form.
Figure 2
10. List any three criteria for guiding the selection of specification language and briefly explain each
of them.
These days, the car's door is locked and unlocked using RF based controls. The RFtransmitter is
part of door key that sends signals on key presses. The receiver is designed as part of embedded
system design in car that receives the RF signals and the controller in the system opens and
closes the doors using motor controls. Assuming the needed data, illustrate the design of car
controller using multi-way partitioning for heterogeneous system based on COSYMA. Hints are
to include RF bus signal, processes for bus interface control, message passing and motor control
and timings that are needed.
Page 3 of 3
INSTITUTE OF AERONAUTICAL ENGINEERING
(Autonomous)
M.Tech I Semester End Examinations (Regular) February, 2017
Regulation: IARE-R16
HARDWARE AND SOFTWARE CO-DESIGN
(Embedded Systems)
Time: 3 Hours Max Marks: 70
Answer ONE Question from each Unit
All Questions Carry Equal Marks
All parts of the question must be answered in one place only
UNIT I
1. In India, railway department has to control trafficin many road track intersection points. As
known, the crossing gates are normally installed on the intersection to have appropriate controls.
Such a system that is installed for train tracks from Hyderabad to Bengaluru is shown in the
figure below that comprises of the following:
i. There are two sensors Sensor_HY, Sensor_BE that will be asserted (logic high) on detection
of train on track.
ii. The gate is closed when GATE is asserted (logic high)
iii. The lights have two conditions namely red and green. When LIGHT is asserted (logic high),
the light becomes red while if it is not asserted it keeps the normal state that is green.
Figure 1
Build a state based FSM model for the controller that performs the following:
i. When no trains are detected, the gates remain open and lights are green.
ii. When train arrivals are detected, the gates must close and light is red.When a train arrives
on either side, the gate is closedfor sensor assertion. The red light is switched ON as soon
as the arrival is confirmed by sensor de-assertion on that side. When the train departs from
other side, the moment other side sensor detects the train (assertion), the lights are turned
green and gate is opened only after the sensor de-asserts (meaning a confirmation of training
going away).
Page 1 of 3
It can be assumed that is no possibility of trains to arrive in both directions and also at no
instance of time two trains will be in the section between two sensors.
The micro-controllers are available following RISC and CISC architecture. For example: 8051 is
CISC based while ARM is RISC based. Bring out three differences and substantiate the same
using the diagrams.
2. What is the need of Hardware-Software Co-synthesis? Describe one Architecture model considering
an example.
What is the fundamental difference between Vulcan and Coysma methodologies for hardware/software
partitioning? Considering COYSMA strategy, show a mathematical analysis on how we
could make an estimation of decrease in execution time. Assume the time parameters needed for
this strategy.
UNIT II
3. What is the necessity of emulation and prototyping?Brief the future developments in emulation
and prototyping of the hardware software co-design with specifications.
Explain the steps of FPGA configuration process and modes of simulation modes available.[6M]
4. List out any three techniques of component specialisation which is one of the architecture specialisation
techniques. Briefly explain them with concept and an example.
The popular microcontroller 8051 is a classic example that represents many generic microcontrollers.
Illustrate how specialisation for instruction set, data path and memory architecture are
applied in 8051 microcontroller.
UNIT III
5. What do we mean by compilation of a source code? Explain with a diagram the traditional steps
in this compilation? List down any three challenges encountered by such traditional compilation
model to embedded processors?
is considered to be most popular languages for embedded programming. However, there are
certain limitations of as an embedded system programming. List any three limitations.[6M]
6. When the programmer uses high level coding, does he/she need to understand the embedded
hardware? Substantiate your answer. What is the need of other levels of coding like mid, low
and assembly?
Which technique of source-level debugging will you try out first to debug scenarios below?
i. A function implemented returns wrong values and not as expected.
ii. The event is handled as per the needed timing on Simulator run while it very much delayed
than expected when it is run on hardware.
iii. LED is connected to GPIO but does not get switched ON as expected even though it seems
the code looks fine when walked through.
UNIT IV
7. Consider a TV system that is remote controlled wirelessly by two different remote controllers
One via Infra-Red remote that is normally used by layman while the second remote
control from Android phone used by tech-savvy person that works via WiFi?For eg: Volume
increase/decrease can be done from either Android phone or IR remote.Introduce concurrency
and comment about the need of following concurrent computation for this scenario of processing
user events:
Page 2 of 3
i. non-determinant
ii. simultaneity
iii. multiprocessing?
Bring out proper rationale.
Explain the need of co-ordinating concurrent computation or process with a practical example
and how the implementation of the same is achieved with one approach?
8. There are two processes running on embedded systems. One process ProcessRead reads the
sensors via Analog to Digital Converter of processor while another process ProcessMain is responsible
for other functionalities of system with one of the functions to processes the sensor
values and takes necessary actions. Propose possible mechanisms of sharing sensor data between
ProcessRead and ProcessMain and make a recommendation of one mechanism reasoning it out.
If there is an interface for copying source string pointed by source to destination string pointed by
destination with a return to character array, how do you verify the interface static and safety?
The interface in will be:
char* strcpy(char* destination, const char* source);
UNIT V
9. Explain the scheme of homogeneous and heterogeneous specifications for system level specifications.
Also bring out the key issues with each of these schemes to provide insights into these
schemes.
Below is the program that finds the greatest number among b and c. Draw the control flow
graph that is considered to be language oriented intermediate form.
Figure 2
10. List any three criteria for guiding the selection of specification language and briefly explain each
of them.
These days, the car's door is locked and unlocked using RF based controls. The RFtransmitter is
part of door key that sends signals on key presses. The receiver is designed as part of embedded
system design in car that receives the RF signals and the controller in the system opens and
closes the doors using motor controls. Assuming the needed data, illustrate the design of car
controller using multi-way partitioning for heterogeneous system based on COSYMA. Hints are
to include RF bus signal, processes for bus interface control, message passing and motor control
and timings that are needed.
Page 3 of 3
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