Exam Details
| Subject | computer organization and architecture | |
| Paper | ||
| Exam / Course | computer science and engineering | |
| Department | ||
| Organization | Vardhaman College Of Engineering | |
| Position | ||
| Exam Date | June, 2017 | |
| City, State | telangana, hyderabad |
Question Paper
Hall Ticket No:
Question Paper Code B3203
(AUTONOMOUS) M. Tech I Semester Supplementary Examinations, June 2017
(Regulations: VCE-R15) COMPUTER ORGANIZATION AND ARCHITECTURE
(Computer Science and Engineering) Date: 09 June, 2017 AN
Time: 3 hours
Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks
1.
Construct NOR gate by using Half-adder with the help of neat diagram.
6M
Draw the graphic symbol and characteristic table of SR-flip-flop and D-flip-flop.
8M
2.
Define Bus. With a neat diagram, explain the single bus structure of a digital computer. Also list any three differences between single bus and multiple bus structures.
8M
Write the IEEE single-precision floating point format. Represent 100.2510 using the same.
6M
3.
Explain instruction pipelining with neat Time Space diagram.
6M
Why do we use addressing mode? Explain the basic addressing modes.
8M
4.
Explain the following:
i. Branch Prediction
ii. Delay branch
iii. Operand forwarding
6M
Perform division of 15 by 4 using Restoring division algorithm.
8M
5.
Explain how control signals are generated using Hardwired control unit.
8M
Explain the concept of superscalar processing.
6M
6.
Explain the types of semiconductor RAM memories and draw the block diagram of RAM.
6M
Explain in detail about cache memory with associative mapping.
8M
7.
What is the difference between isolated I/O and memory-mapped What are the advantages and disadvantages of each?
6M
Discuss the priority interrupt schemes that can be used to handle simultaneous interrupt requests.
8M
8.
Describe the following terminology:
i. Critical section
ii. Semaphore
iii. Hardware lock
6M
Define Cache coherence. Discuss the Write-Through and Write-Back protocols for performing write operations on data in a cache.
8M
Question Paper Code B3203
(AUTONOMOUS) M. Tech I Semester Supplementary Examinations, June 2017
(Regulations: VCE-R15) COMPUTER ORGANIZATION AND ARCHITECTURE
(Computer Science and Engineering) Date: 09 June, 2017 AN
Time: 3 hours
Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks
1.
Construct NOR gate by using Half-adder with the help of neat diagram.
6M
Draw the graphic symbol and characteristic table of SR-flip-flop and D-flip-flop.
8M
2.
Define Bus. With a neat diagram, explain the single bus structure of a digital computer. Also list any three differences between single bus and multiple bus structures.
8M
Write the IEEE single-precision floating point format. Represent 100.2510 using the same.
6M
3.
Explain instruction pipelining with neat Time Space diagram.
6M
Why do we use addressing mode? Explain the basic addressing modes.
8M
4.
Explain the following:
i. Branch Prediction
ii. Delay branch
iii. Operand forwarding
6M
Perform division of 15 by 4 using Restoring division algorithm.
8M
5.
Explain how control signals are generated using Hardwired control unit.
8M
Explain the concept of superscalar processing.
6M
6.
Explain the types of semiconductor RAM memories and draw the block diagram of RAM.
6M
Explain in detail about cache memory with associative mapping.
8M
7.
What is the difference between isolated I/O and memory-mapped What are the advantages and disadvantages of each?
6M
Discuss the priority interrupt schemes that can be used to handle simultaneous interrupt requests.
8M
8.
Describe the following terminology:
i. Critical section
ii. Semaphore
iii. Hardware lock
6M
Define Cache coherence. Discuss the Write-Through and Write-Back protocols for performing write operations on data in a cache.
8M
Other Question Papers
Subjects
- advanced algorithms
- advanced algorithms laboratory
- advanced data communications
- advanced data structures
- advanced data structures laboratory audit course – i
- advanced mechanics of solids
- advanced mechanisms
- advanced operating systems
- advanced operating systems laboratory
- artificial intelligence and neural networks
- business analytics
- cloud computing
- cloud computing laboratory
- cmos vlsi design
- computer graphics
- computer organization and architecture
- computer vision and pattern recognition
- constitution of india
- cpld and fpga architectures and applications
- cryptography and computer security
- data warehousing and data mining
- datawarehousing and data mining
- design patterns
- digital image processing
- digital systems design
- disaster management
- distributed computing
- distributed databases
- distributed operating systems
- dsp processors and architectures
- embedded linux
- embedded real time operating systems
- embedded systems
- energy conversion systems
- english for research papers writing
- entrepreneurship development
- finite element methods
- fracture, fatigue and creep deformation
- human computer interaction
- image processing
- industrial safety
- information retrieval systems
- information security
- machine learning
- major project phase-i
- major project phase-ii
- microcontrollers for embedded system design
- mini project with seminar audit course – ii
- mobile computing
- mobile satellite communications
- national service scheme
- number theory and cryptography
- object oriented analysis and design
- operations research
- pedagogy studies
- personality development through life enlightenment skills
- power electronic control of dc drives
- power electronic converters-i
- power semi conductor devices
- principles of machine modeling analysis
- research methodology and intellectual property rights
- sanskrit for technical knowledge
- semantic web and social networks
- software engineering principles
- solar, energy and applications
- stress management by yoga
- system modeling and simulation
- value education
- waste to energy
- web security
- wireless and mobile computing