6th Semester BE (CBCS) Open Electives Model Question Papers
15EC661
Visvesvaraya Technological University, Belagavi
MODEL QUESTION PAPER
6th Semester, B.E (CBCS) Open Elective
Course: 15EC661- DATA STRUCTURE Time: 3 Hours U SING Max. Marks: 80 Note: Answer Five full questions selecting any one full question from each Module. Question on a topic of a Module may appear in either its 1st or/and 2nd question.
Module-1 Marks
1 a Discuss template functions in Write template function to swap two parameters
with arguments being two integers or two float values 5
b Explain how "new" operator is used for dynamic memory allocation in Write a
function to allocate memory dynamically to a two dimensional array. 5
c Briefly explain Recursion. Write recursive function in to find factorial of a
number 6
OR
2 a Write ADT specification for Linear Lists. 7
b Write a program to insert a given element at the indexth position. 6
c Write destructors for chain. 3
Module-2
3 a Write a program to add two matrices. 6
b Explain how parenthesis matching is carried out using stacks. Write C++function for
the same. 10
OR
4 a Write a program to transpose a given Sparse matrix. 10
b Write abstract class for Stacks. 6
Module-3
5 a What is the advantage of circular queue over simple queue? With neat diagrams
explain how array length can be doubled in a circular queue 9
b Explain how overflow condition is eliminated using hashing with chains. Compare
with the Linear probing method. 7
OR
6 a Discuss problem description and solution strategy for rail road car rearrangement 8
b Write short notes on Hashing 8
Module-4
7 a Draw the binary expression trees corresponding to each of the following expressions.
1.
2.
6
b Write functions for
1. Pre-order traversal of a Binary tree
2. Determining height of the binary tree
10
OR
8 a Write short notes on Linked representation of binary trees 10
b Write preorder, inorder and postorder traversals for the tree given below.
6
Module-5
9 a Explain the operations insertion and deletion for Max Heaps 8
b Write a function to search for an element in Binary Search Trees. 8
OR
10 a Write a function for Heap-Sort and explain Heap-Sort with neat diagrams. 10
b Discuss Binary Search Trees with duplicates 6
Note: In the updated syllabus, the publisher of the prescribed text book has 'Universities Press', instead of 'Mc. Graw Hill.' been changed to
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Visvesvaraya Technological University, Belagavi
MODEL QUESTION PAPER
6th Semester, B.E (CBCS) Open Elective
Course: 15EC662-POWER ELECTRONICS
Time: 3 Hours Max Marks: 80
Note: Answer Five full questions selecting any one full question from each Module.
Question on a topic of a Module may appear in either its 1st or 2nd question.
Module 1
1 Draw the circuit diagram, and control characteristics of GTO,MCT and TRAIC. 6
What is a converter? How are power converters classified? Explain briefly. 6
With the help of relevant equations and waveforms explain steady state characteristics of
power BJT. 4
OR
2 Explain the switching characteristics of power MOSFET with neat diagram. 6
What is an IGBT? Compare IGBT with BJT and MOSFET. 6
Give the definition of power electronics. Explain the relationship of power electronics to
power electronics and control. Mention two applications of power electronics. 4
Module 2
3 Explain the turn-on mechanism of a thyristor using two transistor analogy and derive an
expression for the anode current in terms of transistor parameters. 8
Explain different operation regions of SCR gate characteristics. 4
Explain dynamic switching characteristics of SCR. 4
OR
4
With a circuit diagram and waveform explain RC-triggering circuit. 5
Differentiate natural and forced commutation? Briefly explain different types of forced
commutation. 6
Sketch the V-I characteristics of an SCR and explain Latching current Holding
current Break over voltage. 5
Module 3
5
With a neat diagram and waveform, explain the principle of single phase full converter
with a purely resistive load. Derive the expression for output voltage and RMS output
voltage.
6
What are the advantages of single phase dual convertor operation with circulating current? 5

For a single phase fully has RL load having L=6.5 mH,R=0.5 ohms and E=10v. The input
voltage is Vs= 120v(rms) at 60Hz. Dertermine a)load current at wt=α=60o, average
thyristor current IA c)rms thyristor current IR d)rms output current Irms average output
current Idc.
5
OR
6
Explain the operation of single phase AC voltage controllerfor inductive load with the help
of circuit diagram and waveform. 6
Derive an expression for the rms value of the output voltage of the bidirectional AC
voltage controller, employing ON-OFF control. 6

A single-phase half wave AC voltage controller has a resistive load of 5Ω and input
voltage Vs=120v,60Hz. The delay angle of thyristor is α Find the
RMS value of output voltage
ii) input power factor
iii) average input current.
4
Module 4
7

With relevant equations and waveform explain step-down convertor with R-L load. 6
Explain step -up converter with resistive load. 5

The Buck Regulator has an input voltage of VS= 12v. The required average output voltage
is Va= 5v at 500 Ω and the peak to peak output ripple voltage is 20mv. The switching
frequency is 25kHz. If the peak to peak ripple current of the inductor is limited to 0.8A.
Determine Duty cycle k filter inductance L and capacitance critical values of L
and C.
5
OR
8
Briefly explain how DC convertors are classified depending on the directions of current
and voltage flows.
6
With circuit diagram and waveform explain Buck Regulator. 5

A boost regulator has an input voltage of Vs=5v. The average ouput voltage Va=15v and
the average load current Ia= 0.5 A. The switching frequency is 25kHz.If 150μH and
C=220 determine duty cycle, ripple current of inductor, peak current of inductor,
ripple voltage of filter capacitor and critical values of L and C.
5
Module 5
9
Explain the performance parameters of inverters. 4
Explain single phase full-bridge inverter with necessary circuit diagram and waveforms.
Derive the equation for RMS output voltage. 6
Explain the working of transistorized current source inverter. 6
OR
10
Explain principle of working of variable DC link inverter. Also mention advantages and
disadvantages. 6
Explain operation of single phase half-bridge inverter and derive the output voltage
equation of the inverter. 6

The single phase full bridge inverter has a resistive load of R=24 ohms and the DC input
voltage of Vs= 48 v. Determine
RMS output voltage at the fundamental frequency.
ii) Output power
iii) Peak and average currents of each transistor.
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15EC663
Visvesvaraya Technological University, Belagavi
MODEL QUESTION PAPER
6th Semester, B.E (CBCS) Open Elective
Course: 15EC663 DIGITAL SYSTEM DESIGN USING VERILOG
Time: 3 Hours Max. Marks: 80 Note: Answer Five full questions selecting any one full question from each Module Question on a topic of a Module may appear in either its 1 . Module-1 st or/and 2nd question. Marks
1 a What is Digital system? Explain how the Digital circuits are evolved over the times. 5
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OR
2 a Develop a test bench model for the 3:8 decoder. 6
b aWnidth a lasno edxraamw pthlee schoorwre sthpeo nddisintign csttaiotne tbreatnwsieteionn a d Miaogorarme a nd Mealy finite-state machine 10
Module-2
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8
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8
OR
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8
b cWohrraets ips oan cdoimngm toon t hcea u8s-eb iot fd saotfat werorrodr s0 i1n1 D00R0A0M1s. Compute the 12-bit ECC word 8
Module-3
a tEyxppiclaail nP CdBif fterarecen?t types of PCB design. How fast does a signal change propagate along a 8
5 b Explain the concept differential signaling .How does differential signaling immunity? improve noise 8
OR
6
a Explain signal integrity interconnection issue in PCB design. 6
b What is the benefit of allowing a PLD in a system to be reprogrammed? 5
c What distinguishes a platform FPGA from a simple FPGA? 5
Module-4
7
a Explain Digital-to-Analog Converters using R/2R ladder DAC. 6
b aWnr 8it-eb ait Vbeursi.l og assignment that represents a tri-state bus driver for 6
c oHfo hwa nddoleins gth aen p inrotecrersusoprt? d etermine where to resume program execution on completion 4
OR
8 a Explain any four serial interface standards. 8
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8
Module-5
9 a Explain the design flow of hardware/software co-design. 10
b What aspects of the design flow does a verification plan cover? 6
OR
10 a Explain Built-in self test (BIST) techniques. 8
b Explain the terms scan design and boundary scan 8