1
Seat No.: Enrolment
GUJARAT TECHNOLOGICAL UNIVERSITY
PDDC SEMESTER-III EXAMINATION WINTER 2018
Subject Code:X30902 Date: 22/11/2018
Subject Name: Analog Digital Electronics
Time: 10:30 AM TO 01:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
Q.1

Draw and explain OPAMP as an inverting amplifier with necessary sketches and equations.
07

Write a short note on OPAMP as a Integrator with necessary circuit diagram and waveforms.
07
Q.2

Draw and explain Pin diagram of 555 IC.
07

Define the following parameters as applied to an OP-AMP
CMMR PSRR Slew Rate Input Offset Voltage
07
OR

Discuss op-amp application as a First-order high-pass Butterworth filter.
07
Q.3

Draw the block diagram of phase locked loop IC 565. Explain the working principle of PLL.
07

Classify IC Voltage regulators. Explain Basic three terminal IC regulators with the help of Block diagram.
07
OR
Q.3

Sketch the circuit of Op-amp as Differentiator and explain with necessary waveforms.
07

What do you mean by input offset voltage? Draw and explain offset voltage compensating network.
07
Q.4

Define encoder, decoder, multiplexer and de-multiplexer. Give application of each.
07

Discuss universality of NOR gate. Also, Derive all gates with the help of NOR gate.
07
OR
Q.4

Explain De'Morgans theorem s giving necessary logic expressions and diagrams
07

Implement a half Adder/ half Subtractor circuit with its truth table and circuit.
07
Q.5

Use Karnauph map to Simplify:
f A B C D Σ m 2 ,11 ,12 ,14 d 3 10)
07

Explain R S flip flop with necessary truth table. What is race around condition? How to overcome it?
07
OR
Q.5

Derive Full Adder with necessary truth table K-Map. Also express it with
AOI logic diagram.
07

Draw the connection diagram and block diagram of audio power amplifier IC LM 380 and explain it's operation
07