Exam Details

Subject digital electronics
Paper
Exam / Course diploma engineering
Department
Organization Gujarat Technological University
Position
Exam Date May, 2017
City, State gujarat, ahmedabad


Question Paper

1/2
Seat No.: Enrolment
GUJARAT TECHNOLOGICAL UNIVERSITY
DIPLOMA ENGINEERING SEMESTER -III• EXAMINATION SUMMER 2017
Subject Code: 331102 Date: 10 05 2017
Subject Name: Digital Electronics
Time: 10:30 AM TO 01:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make Suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Use of programmable Communication aids are strictly prohibited.
5. Use of only simple calculator is permitted in Mathematics.
6. English version is authentic.
Q.1

Define these terms: Fan In, Fan Out, Noise margin, Propagation Delay, Figure of merit, Hold time and Negative logic.
07





Perform following
(101.1)2 × (1.01)2 (101.101)2 )10
(8C)16 (100)2 )10
Subtract using complement (11010)2 (101)2
07


(101.1)2 × (1.01)2 (101.101)2 )10
(8C)16 (100)2 )10
(11010)2 (101)2

Q.2

Why NAND gate is called Universal gate? Construct AND, OR and EX-OR with the help of NAND gate.
07


NAND NAND AND, OR EX-OR


Explain the working of JK flip-flop with the help of Logic circuit and truth table. Why master slave operation is required?
07

JK

OR

Explain Edge triggered J K Flip flop using truth table and its figure.
07

JK

Q.3

Prove the following:
B
AB'CD
AB BC(B B(A
07



B

2/2
AB'CD
AB BC(B B(A

Obtain the simplified expression of following function with K-map.
f =Σm
07

K-map
f =Σm

OR
Q.3

State and prove De Morgan's theorem.
07





What is Karnaugh Map? A truth table has output 0 for input ABCD=0000, 0010, 0101, 0111, 1100, 1101, 1110, 1111. Simplify using Karnaugh Map draw the simplified circuit.
07

ABCD= 0000, 0010, 0101, 0111, 1100, 1101, 1110, 1111 0

Q.4

Compare combinational and sequential circuits.
07





What is Multiplexer and Demultiplexer? Explain 8 to 1 multiplexer
07

8 1

OR
Q.4

Compare half adder and full adder. Write a short note on full adder.
07





Draw and explain 3 x 8 line Decoder circuit using two 2 x 4 decoders.
07

2 x 4 3 x 8

Q.5

Draw and explain 4-bit synchronous Up Down counter.
07


4


Draw Weighted Resistors type digital to Analog converter and explain its working. Discuss Accuracy for DAC.
07

DAC

OR
Q.5

Compare static and dynamic RAM and Explain ROM, PROM, EPROM
07


RAM ROM, PROM, EPROM


Explain 4 bit R-2R ladder type digital to Analog converter. Discuss Resolution for DAC.
07

4 R-2R DAC




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