Exam Details
| Subject | embedded computing systems | |
| Paper | ||
| Exam / Course | b.tech. - information technology | |
| Department | ||
| Organization | SETHU INSTITUTE OF TECHNOLOGY | |
| Position | ||
| Exam Date | May, 2017 | |
| City, State | tamil nadu, pulloor |
Question Paper
Reg. No.
B.E. B.Tech. DEGREE EXAMINATION, MAY 2017
Fifth Semester
Information Technology
01UIT504 EMBEDDED COMPUTING SYSTEMS
(Regulation 2013)
Duration: Three hours Maximum: 100 Marks
Answer ALL Questions
PART A (10 x 2 20 Marks)
1. Define embedded systems with examples.
2. List out the major goals of the embedded system design.
3. What is interrupting masking?
4. Define worst-case execution time.
5. Define preemption.
6. Give the types of multi state systems.
7. What are the five levels of capability maturity model?
8. What is a logic analyzer?
9. What are the inputs of telephone answering machine?
10. Define data flow graphs.
Question Paper Code: 31854
2
31854
PART B x 16 80 Marks)
11. Explain the hardware and software architecture for moving map. Or Describe in details about the ARM processor.
12. Draw a timing diagram and explain complete operation of DMA. Or Explain in detail about the software performance optimization.
13. Explain the Inter-Process Communication mechanisms with appropriate diagrams. Or Explain the priority based scheduling and types with example.
14. Explain details about the design methodologies. Or Discuss the quality assurance required for an embedded system.
15. Discuss the architecture of digital still cameras. Or
Explain about the design and implementation of alarm clock.
B.E. B.Tech. DEGREE EXAMINATION, MAY 2017
Fifth Semester
Information Technology
01UIT504 EMBEDDED COMPUTING SYSTEMS
(Regulation 2013)
Duration: Three hours Maximum: 100 Marks
Answer ALL Questions
PART A (10 x 2 20 Marks)
1. Define embedded systems with examples.
2. List out the major goals of the embedded system design.
3. What is interrupting masking?
4. Define worst-case execution time.
5. Define preemption.
6. Give the types of multi state systems.
7. What are the five levels of capability maturity model?
8. What is a logic analyzer?
9. What are the inputs of telephone answering machine?
10. Define data flow graphs.
Question Paper Code: 31854
2
31854
PART B x 16 80 Marks)
11. Explain the hardware and software architecture for moving map. Or Describe in details about the ARM processor.
12. Draw a timing diagram and explain complete operation of DMA. Or Explain in detail about the software performance optimization.
13. Explain the Inter-Process Communication mechanisms with appropriate diagrams. Or Explain the priority based scheduling and types with example.
14. Explain details about the design methodologies. Or Discuss the quality assurance required for an embedded system.
15. Discuss the architecture of digital still cameras. Or
Explain about the design and implementation of alarm clock.
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