Exam Details
Subject | computer organization and architecture | |
Paper | ||
Exam / Course | b.e.(computer science and engineering) | |
Department | ||
Organization | SETHU INSTITUTE OF TECHNOLOGY | |
Position | ||
Exam Date | May, 2017 | |
City, State | tamil nadu, pulloor |
Question Paper
Reg. No.
B.E. B.Tech. DEGREE EXAMINATION, MAY 2017
Third Semester
Computer Science and Engineering
01UCS303 COMPUTER ORGANIZATION AND ARCHITECTURE
(Regulation 2013)
Duration: Three hours Maximum: 100 Marks
Answer ALL Questions
PART A (10 x 2 20 Marks)
1. Define big Endean and little Endean format.
2. What do you mean by stored program concept?
3. What are the two techniques for speeding up the multiplication operation?
4. Write down the steps for restoring division and non-restoring division.
5. What are instruction hazards?
6. Define branch folding.
7. Explain instruction level parallelism.
8. Differentiate between multiprogramming and multitasking?
9. Draw the structure of memory hierarchy.
10. Define Bus. What are the different buses in a CPU?
PART B x 16 80 Marks)
11. Explain the components of computer system.
Explain in detail the different types of instructions that are supported in a typical processor.
Question Paper Code: 31233
2
31233
Or Write in detail about various addressing modes.
12. Give the block diagram for a floating point adder sub tractor unit and discuss its operation. Or Explain the floating point addition steps and algorithm in detail.
13. Describe in detail about pipeline processing. Discuss about Data path considerations. Or Discuss the various hazards that might arise in a pipeline. What are the remedies commonly adopted to overcome/minimize these hazards.
14. Explain Multicore Processor in detail. Or Discuss in detail about Flynn's classification.
15. Explain the different ways used for improving the cache performance. Or
Explain the concept of virtual memory with any one virtual management technique.
B.E. B.Tech. DEGREE EXAMINATION, MAY 2017
Third Semester
Computer Science and Engineering
01UCS303 COMPUTER ORGANIZATION AND ARCHITECTURE
(Regulation 2013)
Duration: Three hours Maximum: 100 Marks
Answer ALL Questions
PART A (10 x 2 20 Marks)
1. Define big Endean and little Endean format.
2. What do you mean by stored program concept?
3. What are the two techniques for speeding up the multiplication operation?
4. Write down the steps for restoring division and non-restoring division.
5. What are instruction hazards?
6. Define branch folding.
7. Explain instruction level parallelism.
8. Differentiate between multiprogramming and multitasking?
9. Draw the structure of memory hierarchy.
10. Define Bus. What are the different buses in a CPU?
PART B x 16 80 Marks)
11. Explain the components of computer system.
Explain in detail the different types of instructions that are supported in a typical processor.
Question Paper Code: 31233
2
31233
Or Write in detail about various addressing modes.
12. Give the block diagram for a floating point adder sub tractor unit and discuss its operation. Or Explain the floating point addition steps and algorithm in detail.
13. Describe in detail about pipeline processing. Discuss about Data path considerations. Or Discuss the various hazards that might arise in a pipeline. What are the remedies commonly adopted to overcome/minimize these hazards.
14. Explain Multicore Processor in detail. Or Discuss in detail about Flynn's classification.
15. Explain the different ways used for improving the cache performance. Or
Explain the concept of virtual memory with any one virtual management technique.
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