Hall Ticket No: Question Paper Code: A3508
VARDHAMAN COLLEGE OF ENGINEERING
(AUTONOMOUS) B. Tech IV Semester Regular/Supplementary Examinations, May 2018
(Regulations: VCE-R15) COMPUTER ORGANIZATION AND ARCHITECTURE
(Common to Information Technology Electronics and Communication Engineering) Date: 08 May, 2018 FN Time: 3 hours Max Marks: 75
Answer ONE question from each Unit
All Questions Carry Equal Marks
Unit I
1. What are the different performance measures used to represent a computer system
performance?
9M
What are the basic functional units present in the computer and explain each of them?
6M
2. Explain arithmetic, logical and shift operations with examples. 10M
Let AR, BR, CR and DR the 8 bit registers with the following values. AR=11110010
BR=11111111 CR=10111011 DR=11101010. Determine the values of each register after
execution of the sequence of micro-operations.
AR AR+BR
CR CR^DR,
AR-CR
5M
Unit II
3. Explain stack memory organization in detail. 7M
A computer uses a memory unit with 256K words of 32 bits each. A binary instruction
code is stored in one word of memory. The instruction has four parts: an indirect bit, an
operation code, a register code part to specify one of 64 registers and an address part:
i. How many bits are there in the operation code, the register code part and the address
part?
ii. Draw the instruction word format and indicate the number of bits in each part.
iii. How many bits are there in the data and address inputs of the memory
8M
4. Account on Interrupt cycle. 9M
Given the 16bit value of 1001101011001101. What operation must be performed in order
to:
i. Clear to 0 the first eight bits
ii. Set to 1 the last eight bits
iii. Complement the middle eight bits
6M
Unit III
5. Define the following:
i. Micro operation
ii. Micro instruction
iii. Micro program
iv. Micro code
7M
Derive an algorithm in flowchart form for addition and subtraction of fixed point binary
numbers in signed-magnitude representation with the magnitudes subtracted by the two
micro-operations if E=1 and s .
8M
Cont…2
2
6.
The system uses a control memory of 1024 words of 32 bits each. The microinstruction has three fields and the micro operations field has 16 bits:
i. How many bits are there in the branch address filed and the select field
ii. If there are 16 status bits in the system, how many bits of the branch logic are used to select a status bit
iii. How many bits are required to select an input for the multiplexers
8M
Perform the arithmetic operations below with binary numbers with negative numbers in signed complement representation. Use seven bits to accommodate each number together with its sign. In each case, determine if there is an overflow by checking the carries into and out of the sign bit position.
i. ii. 40) iii. 40) 7M
Unit IV
7.
Give block diagram for the organization of 2MX32 memory module using 512KX8 static memory chip.
8M
Explain the memory hierarchy with neat diagram.
7M
8.
List and explain different types of memory mapping,
9M
With concept explain DMA.
6M
Unit V
9.
Explain arbitration schemes in multiprocessors.
6M
Draw and explain the 8 X 8 omega switch network.
9M
10.
Explain the methodology of different dynamic arbitration algorithms.
10M
Describe the mutual exclusion principle with a semaphore in multiprocessors.
5M