Exam Details

Subject pulse and digital circuits
Paper
Exam / Course b.tech
Department
Organization Institute Of Aeronautical Engineering
Position
Exam Date May, 2018
City, State telangana, hyderabad


Question Paper

Hall Ticket No Question Paper Code: AEC006
INSTITUTE OF AERONAUTICAL ENGINEERING
(Autonomous)
B.Tech IV Semester End Examinations (Regular) May, 2018
Regulation: IARE R16
PULSE AND DIGITAL CIRCUITS
Time: 3 Hours Max Marks: 70
Answer ONE Question from each Unit
All Questions Carry Equal Marks
All parts of the question must be answered in one place only
UNIT I
1. Derive an expression for the output voltages of high pass RC circuit excited by symmetrical
square input. Draw the output for different time constants.
With the help of neat circuit diagram explain the operation of clipping at two different levels.

2. Explain the operation of negative clamper with the neat circuit diagram and waveforms.
A square wave whose peak to peak amplitude is 2V extends ±1V with respect to ground.
The duration of the positive section is 0.1sec and that of the negative section is 0.2sec. If this
waveform is impressed upon an RC integrating circuit whose time constant is 0.2sec. What are
the steady state maximum and minimum values of the output wave form?
UNIT II
3. What is monostable multivibrator? Explain the operation of collector coupled monostable
multivibrator.
Design a bistable multivibrator to meet the following specifications, VCC VBB= 12V, IC(sat)
6mA, hFE 25, maximun triggering frequency 25KHz. Assume VCE(sat) 0.4V,
VBE(sat)= 0.8V, IB(ON) 1.5IB(min).
4. Explain how the astable multivibrator circuit can act as a voltage to frequency converter.
Design a Schmitt trigger circuit using npn transistor for the following specifications VCC 15V,
IC(sat) UTP 8V LTP 5V, hFE(min) 25. Assume 0.5V.
UNIT III
5. Explain the effects of control voltage on gate output of a unidirectional diode gate with neat
sketches.
What are the methods of generating time base waveforms. Derive an expression for sweep speed
error of exponential sweep circuit.
Page 1 of 2
6. Discuss the working of transistor boot strap sweep circuit with neat circuit diagram relevant
equations.
Design a UJT sweep circuit with RB1= RB2= 0
. The sweep amplitude is to be 10V. The
sweep duration is 1ms and sweep speed error is to be the valley point voltage is 3V. Specify
reasonable values for VBB, VY Y R and C.
UNIT IV
7. What do you mean by relaxation circuit. Explain the principle of operation of sweep generator
using UJT with neat sketches.
With the help of circuit diagram and waveforms explain frequency division by an astable multivibrator.

8. Describe the method involved in synchronization of a sweep circuit with symmetrical signals with
neat sketches.
With the neat sketch, explain the sine wave frequency division with a sweep circuit.
UNIT V
9. Draw and explain the two input TTL NAND gate with totem pole output. What are the
advantages and disadvantages of totem pole.
Explain the operation of ECL OR gate with a neat diagram. What are the drawbacks of ECL
family.
10. Describe the operation of DTL NAND gate. Clearly mention the purpose served by the diodes
D1 and D2. What are the conditions to be fulfilled for the output to be in saturation.
Draw the circuit of CMOS NOR gate and explain its operation . Mention the advantages over
other digital logic families.


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