Exam Details
Subject | computer architecture | |
Paper | ||
Exam / Course | m.tech | |
Department | ||
Organization | Institute Of Aeronautical Engineering | |
Position | ||
Exam Date | February, 2018 | |
City, State | telangana, hyderabad |
Question Paper
Hall Ticket No Question Paper Code: BES003
INSTITUTE OF AERONAUTICAL ENGINEERING
(Autonomous)
M.Tech I Semester End Examinations (Regular) February, 2018
Regulation: IARE-R16
COMPUTER ARCHITECTURE
(Embedded Systems)
Time: 3 Hours Max Marks: 70
Answer ONE Question from each Unit
All Questions Carry Equal Marks
All parts of the question must be answered in one place only
UNIT I
1. Explain Amdahl's law in detail with suitable applications.
Explain different addressing modes for instruction set architecture with an example for each.
2. Mention different types of control flow instructions, and explain the supporting addressing modes
elaborating the parameters of evaluation.
Explain type and size of operands explaining their operation in the instruction set.
UNIT II
3. Explain hardware based speculation and limitations of instruction level parallelism.
Explain Tomasulo's algorithm with an example and give one real time application to it.
4. Explain cross cutting issue of hardware versus software speculation.
What is instruction level parallelism? Elaborate instruction level parallelism concepts and challenges.
UNIT III
5. Which is more important for floating point programs: two-way set associativity or hit under
one miss? Assume the following average miss rates for 8kB data cahes: 11.4% for floating-point
programs with a direct-mapped cache, 10.7% for these programs with a two-way set-associative
cache, 7.4% for integer programs with a direct-mapped cache and 6.0% for integer programs with
a two-way set-associative cache. Assume the average memory stall time is just the product of
the miss rate and the miss penalty and the cache describe for 16 clock cycles of L2 cache.
Explain how a protection is achieved via virtual memory.
6. Explain about multi-threading concept with suitable examples.
What are the limitations in symmetric shared memory multiprocessors and snooping protocols?
Page 1 of 2
UNIT IV
7. Explain different raid levels, with their fault tolerance and their overhead in redundant disks.
Explain characteristics of transaction processing council benchmarks.
8. Discuss about I/O performance, reliability measures and bench marks.
Enumerate the steps to follow in designing an I/O system. Explain in detail.
UNIT V
9. Explain interconnecting network's practical problems in detail with an example.
Write a note on designing procedure of a cluster with an example.
10. Interpret the interconnection network media. How it will affect the interconnection networking
media.
Describe the various challenges of clusters and explain how to provide solutions to these
challenges.
Page 2 of 2
INSTITUTE OF AERONAUTICAL ENGINEERING
(Autonomous)
M.Tech I Semester End Examinations (Regular) February, 2018
Regulation: IARE-R16
COMPUTER ARCHITECTURE
(Embedded Systems)
Time: 3 Hours Max Marks: 70
Answer ONE Question from each Unit
All Questions Carry Equal Marks
All parts of the question must be answered in one place only
UNIT I
1. Explain Amdahl's law in detail with suitable applications.
Explain different addressing modes for instruction set architecture with an example for each.
2. Mention different types of control flow instructions, and explain the supporting addressing modes
elaborating the parameters of evaluation.
Explain type and size of operands explaining their operation in the instruction set.
UNIT II
3. Explain hardware based speculation and limitations of instruction level parallelism.
Explain Tomasulo's algorithm with an example and give one real time application to it.
4. Explain cross cutting issue of hardware versus software speculation.
What is instruction level parallelism? Elaborate instruction level parallelism concepts and challenges.
UNIT III
5. Which is more important for floating point programs: two-way set associativity or hit under
one miss? Assume the following average miss rates for 8kB data cahes: 11.4% for floating-point
programs with a direct-mapped cache, 10.7% for these programs with a two-way set-associative
cache, 7.4% for integer programs with a direct-mapped cache and 6.0% for integer programs with
a two-way set-associative cache. Assume the average memory stall time is just the product of
the miss rate and the miss penalty and the cache describe for 16 clock cycles of L2 cache.
Explain how a protection is achieved via virtual memory.
6. Explain about multi-threading concept with suitable examples.
What are the limitations in symmetric shared memory multiprocessors and snooping protocols?
Page 1 of 2
UNIT IV
7. Explain different raid levels, with their fault tolerance and their overhead in redundant disks.
Explain characteristics of transaction processing council benchmarks.
8. Discuss about I/O performance, reliability measures and bench marks.
Enumerate the steps to follow in designing an I/O system. Explain in detail.
UNIT V
9. Explain interconnecting network's practical problems in detail with an example.
Write a note on designing procedure of a cluster with an example.
10. Interpret the interconnection network media. How it will affect the interconnection networking
media.
Describe the various challenges of clusters and explain how to provide solutions to these
challenges.
Page 2 of 2
Other Question Papers
Subjects
- ac to dc converters
- advanced cad
- advanced concrete technology
- advanced data structures
- advanced database management system
- advanced mechanics of solids
- advanced reinforced concrete design
- advanced solid mechanics
- advanced steel design
- advanced structural analysis
- advanced web technologies
- big data analytics
- computer aided manufacturing
- computer aided process planning
- computer architecture
- computer oriented numerical methods
- cyber security
- data science
- data structures and problem solving
- dc to ac converters
- design for manufacturing and assembly
- design for manufacturing mems and micro systems
- design of hydraulic and pneumatic system
- distributed operated system
- earthquake resistant design of buildings
- embedded c
- embedded networking
- embedded real time operating systems
- embedded system architecture
- embedded system design
- embedded wireless sensor networks
- english for research paper writing
- finite element method
- flexible ac transmission systems
- flexible manufacturing system
- foundations of data science
- foundations of data sciences
- fpga architecture and applications
- hardware and software co-design
- high performance architecture
- intelligent controllers
- internet of things
- introduction to aerospace engineering
- mathematical foundation of computer
- mathematical methods in engineering
- matrix methods of structural analysis
- micro controllers and programmable digital signal processing
- multilevel inverters
- numerical method for partial differential equations
- power electronic control of ac drives
- power electronic control of dc drives
- power quality
- precision engineering
- principles of distributed embedded systems
- programmable logic controllers and their applications
- rapid prototype technologies
- rehabilitation and retrofitting of structures
- renewable energy systems
- research methodology
- soft computing
- special machines and their controllers
- stress analysis and vibration
- structural dynamics
- structural health monitoring
- theory of elasticity and plasticity
- theory of thin plates and shells
- web intelligent and algorithm
- wireless lan’s and pan’s
- wireless lans and pans
- wireless sensor networks