VARDHAMAN COLLEGE OF ENGINEERING
(AUTONOMOUS)
B. Tech VI Semester Regular Examinations, May 2018
(Regulations: VCE-R15)
DIGITAL ELECTRONICS
(Mechanical Engineering)
Date: 21 May, 2018 FN Time: 3 hours Max Marks: 75
Answer ONE question from each Unit
All Questions Carry Equal Marks
Unit I
1. Convert the following:
i. (172.625)10
ii. (ABCD.72)16
iii. (10111101.0101)2 )10
iv. (1062.403)8 )10
8M
Simplify the following expression using Boolean laws and draw logic diagram for each
simplified expression using Basic gates.
i. X Y Z XYZ Z X Z

ii. B B
7M
2. Subtract (1043.06)10 from (364.425)10 using:
i. Complement Method
ii. 10's Complement Method
6M
i. Write the symbol, truth table and final expression for AND, NOR and EX-OR gate
(For two
ii. Rewrite the following Boolean expression in the standard POS:
I.
II.
9M
Unit II
3. Solve(Simplify) the following Boolean equation Using Quine-McClusky technique

8M
Get the minimized product-of sum(OAI) expression for N
with don't cares: Use Karnaugh map for simplification and write
PIs and EPIs.
7M
4.

Using tabulation method, obtain the minimal expression for

7M
Obtain the minimal SOP for the function and implement it in OAI
logic.
8M
Unit III
5. Design full adder and implement using two half adders. 8M
Draw the block diagram of Programmable Logic Array and explain.
7M
6. Implement the following function using 4:1 Mux:
F
7M
Draw logic diagram of 2:4 decoder and explain using truth table. Also implement full
Subtractor using 3:8 decoder.
8M
Cont…2

Unit IV
7.

Draw the block diagram of sequential circuit and explain.
4M

i. Mention the differences between flip flop and latch
ii. Derive the characteristic equation of the following flip flops
I. SR Flip Flop
II. JK Flip Flop
11M
8.

Distinguish between synchronous and asynchronous circuits.
3M

Draw circuit diagram of SR Latch using NAND gates and explain its working with the help of truth table. Construct a D Flip Flop from a JK Flip Flop.
12M
Unit V
9.

Compare synchronous with asynchronous counter. Explain LFSR counter.
7M

Draw the circuit diagram for 4-bit ripple down counter using T Flip-Flop and plot the output waveform.
8M
10.

Draw the logic network for MOD-6 Johnson counter and explain the operation with timing diagram.
7M

With the help of suitable circuit diagram, explain the following operations in a shift register:
i. SISO
ii. PISO