BCA-07/DCA-102
December Examination 2017
BCA Pt. II/DCA Examination
Operating System I
Paper BCA-07/DCA-102
Time 3 Hours Max. Marks 100
Note: The question paper is divided into three sections B and C. Write answers as per given instructions.
Section A 10 × 2 20
(Very Short Answer Questions)
Note: Answer all questions. As per the nature of the question delimit your answer in one word, one sentence or maximum upto 30 words. Each question carries 2 marks.
Differentiate between hard real time and soft real time OS.
What is thread?
Define Operating System.
Name an algorithm for page replacement.
Define page offset.
What is CUI (Character Based User Interface)?
Name two system threats.
426
BCA-07/DCA-102 200 3 (P.T.O.)
BCA-07/DCA-102 200 3 (Contd.)
426
(viii) What is Kernel?
State producer consumer problem.
What is critical section problem.
Section B 4 × 10 40
(Short Answer Questions)
Note: Answer any four questions. Each answer should not
exceed 200 words. Each question carries 10 marks.
What do you mean by file attributes?
Briefly discuss various process states.
What are benefits of multiprogramming?
List differences between user level threads and kernel level
threads.
Give comparison between access list and capabilities list.
Explain semaphore and its different types.
Explain various scheduling criteria. Why we need scheduling
algorithm?
Discuss the principle behind Trojan horse.
BCA-07/DCA-102 200 3
426
Section C 2 × 20 40
(Long Answer Questions)
Note: Answer any two questions. You have to delimit your each
answer maximum upto 500 words. Each question carries
20 marks.
10) Given following information.
Process no. Arrival time CPU Burst
1 0 10
2 1 2
3 2 3
4 3 1
5 4 5
Compute waiting and turnaround time for FCFS and SJF
scheduling algorithms.
Which of the schedules in part results in the minimal
average waiting time (over all processes)
11) Explain process Synchronization. How semaphores are used
for process synchronization? Give an example.
12) What you understand by safe and unsafe state? Explain
banker's algorithm with necessary data structure for deadlock
avoidance.
13) Explain briefly the role of the compiler, loader, and memory
management hardware in the following address schemes:
Compile time binding
Load time binding
Runtime binding