M.Sc. (Semester (CBCS) Examination Mar/Apr-2018
Physics (Materials Science)
ANALOG DIGITAL ELECTRONICS
Time: 2½ Hours
Max. Marks: 70
Instructions: Q.1 and Q.2 are compulsory. Attempt any three questions from Q. 3 to 7. Figures to the right indicate full marks.
Q.1

Select the correct alternative:
08
In 8085, memory read cycle is stated.
3
4
5
6
The output impedance of opamp is decreases due to feedback.
Negative
Positive
Negative Positive
None on these
IC 741 Opamp has slew rate of m V/°C.
0.6
0.5
0.3
0.4
The gates are mainly used for checking parity of data.
NOR
NAND
EX-OR
EX-NOR
The gate has two or more input signals but only one output signals.
OR
AND
XOR
XNOR
Decade counter requires number of flip flops.
3
5
4
2
In microprocessors symbolic address is recorded in the field.
Label
Opcode
Operand
Comment
In 8085, signal is used to demultiplex address/ data bus.
RD
WR
ALE
INTR

Fill in the blanks State true or false:-
06
In JK flip flop race around condition arises due to
The sawtooth waveform has a rise time many times than the fall time
feedback is used in oscillator circuits.
In the oscillator circuit the total phase shift of the loop gain must be
A demultiplexer is used to perform conversion.
An ideal operational amplifier has zero output impedance.
Page 2 of 2
SLR-UN-472
Q.2
Attempt following:-
14
Addressing modes of 8085 microprocessor
Op Amp as an Integrator
Adjustable voltage regulators
Q.3
Explain non inverting configuration of 3 input Op Amp as a summing, scaling and averaging amplifier.
08
Explain effect of negative feedback on output resistance of Op Amp.
06
Q.4
What is Oscillator? Describe phase shift oscillator, obtain an expression for frequency of oscillation.
08
Design a phase shift oscillator for f0 1 KHz, using IC741.
(Supply Voltage
06
Q.5
Draw and explain function block diagram of Intel 8085 microprocessor.
08
Explain demultiplexing of AD0- AD7 signals.
06
Q.6
What is shift register? Draw and explain logic diagram of PIPO shift register.
08
Draw and explain 16:1 multiplexer using AND gate.
06
Q.7
Write an ALP for addition of two 8 bit numbers using Direct addressing mode.
08
Reduce the following logical expressions using Boolean laws:
A BC+ABC +ABC+A B Draw logic diagram of reduced expression
06