M.Sc. (Semester (CBCS) Examination Oct/Nov-2017
Physics (Materials Science)
ANALOG DIGITAL ELECTRONICS
Day Date: Tuesday, 21-11-2017 Max. Marks: 70
Time: 10.30 AM to 01.00 PM
Instructions: Q.1 and Q.2 are compulsory.
Attempt any three questions from Q. 3 to 7.
Figures to the right indicate full marks.
Q.1 Select the correct alternative: 08
The gain of phase shift oscillator is
29 30
25 24
Multiplexer have
Many one O/P One I/P Many
Both a and b None of these
An Integrator has in the input terminal, for an Opamp based
circuit.
Resistance Inductor
Capacitor None of these
Output impedance of IC 741 is typically
100 1000
10 1
Opamp is generally not used as
Differentiator Integrator
Substractor Divider
Oscillator uses capacitive voltage divider feedback.
Hartley Phase shift
Colpit Wien bridge
Opcode fetch cycle of Intel 8085 is stated.
4 3
5 6
In 8085 microprocessor register used as a working area in CPU.
A B
H None of these
Q.1 Fill in the blanks State true or false:- 06
SR flip flop does not accept the input entry when
Colpit oscillator circuit uses tapped inductive feedback.
Switching regulator is used for high power applications.
IC 7490 is used for generation of control signals.
Phase shift of the Phase Shift Circuit at the resonance frequency is

Intel 8085 microprocessor has bit size of data bus.
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SLR-MO-515
Q.2 Attempt following:- 14
Deduce virtual ground concept
DeMorgans Theorem
SIPO shift register
Q.3 Draw and explain Hartley Oscillator using Opamp. Obtain an expression for
frequency.
08
Design a non inverting amplifier with Av=11, Given Ib 100nA, Vi>1 V. 06
Q.4 What is feedback? Explain effect of negative feedback on input resistance of
Opamp.
08
Draw and explain differentiator using Op Amp. 06
Q.5 Explain architecture of 8085 microprocessor. 08
Draw and explain memory read cycle of 8085 microprocessor. 06
Q.6 Explain D flip-flop. 08
Draw and explain 1:8 Demultiplexers. 06
Q.7 Explain inverting configuration of 3 inputs Op Amp as summing, scaling and
averaging amplifier.
08
Reduce the following logical expressions using Boolean laws:
B AB) BC ABC)
Draw logic diagram of reduced expression.