Exam Details
Subject | digital fundamentals | |
Paper | ||
Exam / Course | mca | |
Department | ||
Organization | apj abdul kalam technological university | |
Position | ||
Exam Date | July, 2018 | |
City, State | kerala, thiruvananthapuram |
Question Paper
E E1895 Pages: 2
Page 1 of 2
Reg
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
FIRST SEMESTER MCA DEGREE EXAMINATION, JULY 2018
Course Code: RLMCA109
Course Name: DIGITAL FUNDAMENTALS
Max. Marks: 60 Duration: 3 Hours
PART A
Answer all questions, each carries 3 marks Marks
1 Convert the hexadecimal number 8A9D into binary number system.
Convert the decimal number 2378 to Binary Coded Decimal.
2 What is the key feature of cell adjacency in Karnaugh map?
3 Prove that A A B.
4 Show how a full adder can be converted to a full subtractor with the addition of
one inverter circuit.
5 Design the circuit of a half adder using only NAND gates.
6 Derive the excitation table of RS flip-flop from the truth table of RS flip-flop.
7 Mention any four applications of shift registers.
8 Differentiate synchronous and asynchronous counters.
PART B
Answer six questions, one full question from each module and carries 6 marks
Module I
9 Perform the following number conversions.
Decimal number 65.42 into binary number.
ii) Octal number 4653 into decimal number.
Represent the positive binary number 1100110111000002 to a single precision
floating point binary number.
OR
10 Convert the decimal numbers 56 and -27 to binary and add using the
complement form.
Given the signed binary number in complement form as 10111111, determine
its decimal value.
Module II
11 Find the simplified expression for the following Boolean expressionusing
Karnaugh map.
Y ABC′D B′D A′D′ B′CD
OR
12 Explain the universal gate. Implement the basic gates with any one of the
universal gates.
Module III
13 Design a full adder using a decoder.
OR
E E1895 Pages: 2
Page 2 of 2
14 Explain the internal construction of 4 X1 multiplexer. How do you implement a
function using this multiplexer with
connected to selection lines S2 ,S1 and S0 respectively.
Module IV
15 Derive a D flip-flop from RS flip-flop.
OR
16 Design JK flip-flop using NAND gates and explain its working.
Module V
17 Draw the circuit and explain the working of an asynchronous decade counter.
OR
18 Mention the different types of shift register. With a circuit diagram explain any
one shift register.
Module VI
19 Describe the architecture of Arduino.
OR
20 Mention the components of motherboard and explain any four among them.
Page 1 of 2
Reg
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
FIRST SEMESTER MCA DEGREE EXAMINATION, JULY 2018
Course Code: RLMCA109
Course Name: DIGITAL FUNDAMENTALS
Max. Marks: 60 Duration: 3 Hours
PART A
Answer all questions, each carries 3 marks Marks
1 Convert the hexadecimal number 8A9D into binary number system.
Convert the decimal number 2378 to Binary Coded Decimal.
2 What is the key feature of cell adjacency in Karnaugh map?
3 Prove that A A B.
4 Show how a full adder can be converted to a full subtractor with the addition of
one inverter circuit.
5 Design the circuit of a half adder using only NAND gates.
6 Derive the excitation table of RS flip-flop from the truth table of RS flip-flop.
7 Mention any four applications of shift registers.
8 Differentiate synchronous and asynchronous counters.
PART B
Answer six questions, one full question from each module and carries 6 marks
Module I
9 Perform the following number conversions.
Decimal number 65.42 into binary number.
ii) Octal number 4653 into decimal number.
Represent the positive binary number 1100110111000002 to a single precision
floating point binary number.
OR
10 Convert the decimal numbers 56 and -27 to binary and add using the
complement form.
Given the signed binary number in complement form as 10111111, determine
its decimal value.
Module II
11 Find the simplified expression for the following Boolean expressionusing
Karnaugh map.
Y ABC′D B′D A′D′ B′CD
OR
12 Explain the universal gate. Implement the basic gates with any one of the
universal gates.
Module III
13 Design a full adder using a decoder.
OR
E E1895 Pages: 2
Page 2 of 2
14 Explain the internal construction of 4 X1 multiplexer. How do you implement a
function using this multiplexer with
connected to selection lines S2 ,S1 and S0 respectively.
Module IV
15 Derive a D flip-flop from RS flip-flop.
OR
16 Design JK flip-flop using NAND gates and explain its working.
Module V
17 Draw the circuit and explain the working of an asynchronous decade counter.
OR
18 Mention the different types of shift register. With a circuit diagram explain any
one shift register.
Module VI
19 Describe the architecture of Arduino.
OR
20 Mention the components of motherboard and explain any four among them.
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