Exam Details
Subject | peripherals and interfacing – ii | |
Paper | ||
Exam / Course | b.sc. – i (ecs) | |
Department | ||
Organization | solapur university | |
Position | ||
Exam Date | December, 2018 | |
City, State | maharashtra, solapur |
Question Paper
B.Sc. II (CBCS) (Semester IV) Examination, 2018
Paper VI Peripherals and Interfacing II
Day and Date Thursday, 13-12-2018 Total Marks 70
Time 10.30 a.m. to 1.00 p.m.
1. Multiple Choice questions 14
Address bus of 8086 is bit.
20 12 16 32
Virtual memory of 80386 is
64 TB 4 GB 64 64 KB
8257 is IC.
PPI PTC DMA DAM
In 8086 instruction queue is byte.
12 8 6 16
8255 has no of ports.
2 3 4 8
STC is group of instruction.
Arithmetic Logical
Data transfer Processor
instruction have implied addressing mode.
MOV ADD POP LXI
In no of pin is used for mode selection.
Pin 33 Pin 10 Pin 34 Pin 38
Real memory of 80286 is
16 MB 20 MB
24 MB None of these
10) is logical group of instruction.
MOV ANI ADD POP
11) 8253 is pin IC.
24 40 20 16
12) In 8086 register shows address of next instruction.
BP AX IP SP
13) In 8086 IC are used for clock generation.
8282 8286 8288 8284
14) The control word of 8255 is bit.
4 8 16 20
2. Answer any seven of the following 14
Compare 8086 and 8088.
Draw flag structure in 8086.
List data transfer group of instruction of 8086.
Give application MMX Pentium.
Draw control word of 8255.
Explain pipeline concept of 8086.
Why we need interfacing
Write features of 80286.
Draw TMOD register of 8051.
3. Answer any two of the following 10
Explain maximum mode pin functions in detail.
Write a program to add two 8 bit numbers.
Explain block diagram of 8255.
Compare RISC and CISC architectures. 4
4. Answer any two of the following 14
Explain features of 80486.
Explain memory mapped IO with diagram.
Explain architecture of 8086.
5. Answer any two of the following 14
Explain minimum mode configuration of 8086.
Write a program for arranging data in ascending order.
Explain architecture of 8051.
Paper VI Peripherals and Interfacing II
Day and Date Thursday, 13-12-2018 Total Marks 70
Time 10.30 a.m. to 1.00 p.m.
1. Multiple Choice questions 14
Address bus of 8086 is bit.
20 12 16 32
Virtual memory of 80386 is
64 TB 4 GB 64 64 KB
8257 is IC.
PPI PTC DMA DAM
In 8086 instruction queue is byte.
12 8 6 16
8255 has no of ports.
2 3 4 8
STC is group of instruction.
Arithmetic Logical
Data transfer Processor
instruction have implied addressing mode.
MOV ADD POP LXI
In no of pin is used for mode selection.
Pin 33 Pin 10 Pin 34 Pin 38
Real memory of 80286 is
16 MB 20 MB
24 MB None of these
10) is logical group of instruction.
MOV ANI ADD POP
11) 8253 is pin IC.
24 40 20 16
12) In 8086 register shows address of next instruction.
BP AX IP SP
13) In 8086 IC are used for clock generation.
8282 8286 8288 8284
14) The control word of 8255 is bit.
4 8 16 20
2. Answer any seven of the following 14
Compare 8086 and 8088.
Draw flag structure in 8086.
List data transfer group of instruction of 8086.
Give application MMX Pentium.
Draw control word of 8255.
Explain pipeline concept of 8086.
Why we need interfacing
Write features of 80286.
Draw TMOD register of 8051.
3. Answer any two of the following 10
Explain maximum mode pin functions in detail.
Write a program to add two 8 bit numbers.
Explain block diagram of 8255.
Compare RISC and CISC architectures. 4
4. Answer any two of the following 14
Explain features of 80486.
Explain memory mapped IO with diagram.
Explain architecture of 8086.
5. Answer any two of the following 14
Explain minimum mode configuration of 8086.
Write a program for arranging data in ascending order.
Explain architecture of 8051.
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