Exam Details
Subject | digital electronics | |
Paper | ||
Exam / Course | b.c.a | |
Department | ||
Organization | solapur university | |
Position | ||
Exam Date | 20, April, 2017 | |
City, State | maharashtra, solapur |
Question Paper
B.C.A. (Semester II) (CBCS) Examination, 2017
DIGITAL ELECTRONICS
Day Date: Thursday, 20-04-2017 Max. Marks: 70
Time: 10.30 AM to 01.00 PM
N.B. All questions are compulsory.
Figures to the right indicate full marks.
Neat diagram must be drawn wherever necessary.
Q.1 Choose correct alternatives: 14
The output of OR Gate Y
A+B A.B
Both a b None of these
The IC 7432 Gate.
AND OR NAND NOR
In Half adder SUM is stored in Gate.
EX-NOR EX-OR NAND AND
In K-map SOP term is
Maxterm Minterm
Pair None of these
Address Bus of 8086 Microprocessor bit.
8 16 20 32
Data bus of 8088 Microprocessor bit.
8 16 20 32
In EX-OR Gate iftwo input lines high the output
Active High Active Low
Toggle None of these
Pentium IV Microprocessor is Bit.
16 64 32 128
DMA techniques use for data transfer.
High Speed Low Speed
Both a and b None of these
10) For selecting Minimum mode 8086 microprocessor pin 33
connected to
VCC VEE GND None of these
Page 1 of 2
SLR-US 9
11) Pin no. 40 in 8086 is
VCC GND
CLK RESET
12) 1001 Gray code of this
1101 1111
0101 None of these
13) D-cache stores
Instruction Data
Cycle None of these
14) is faster memory.
Primary Secondary
Cache None of these
Q.2 Answer the following (Any 14
Define Memory Hierarchy?
Convert Binary to Gray 101101?
Write pin function of ALE?
What is stack?
What is Multicore processor?
State difference between von-Neumann Harvard Architecture?
Write note on Excitation table?
Write difference between 8086 8088 Microprocessor?
Write note on USB?
Q.3 Attempt any two of the following: 10
Write down any four parameters in Memory?
Write note on Address Bus, DataBus control Bus?
Draw the circuit diagram of Half Adder and explain its
working?
Write difference between RISC CISC? 04
Q.4 Attempt any two of the following. 14
Explain any two mapping Techniques in Cache memory?
Draw explain any four Logic Gates?
Distinguish between Synchronous Asynchronous data
Transfer?
Q.5 Attempt any two of the following. 14
Draw internal architecture of 8086. Explain EU section in brief.
Define Virtual Memory? Explain Paging Segmentation?
Write a brief note on K Map?
DIGITAL ELECTRONICS
Day Date: Thursday, 20-04-2017 Max. Marks: 70
Time: 10.30 AM to 01.00 PM
N.B. All questions are compulsory.
Figures to the right indicate full marks.
Neat diagram must be drawn wherever necessary.
Q.1 Choose correct alternatives: 14
The output of OR Gate Y
A+B A.B
Both a b None of these
The IC 7432 Gate.
AND OR NAND NOR
In Half adder SUM is stored in Gate.
EX-NOR EX-OR NAND AND
In K-map SOP term is
Maxterm Minterm
Pair None of these
Address Bus of 8086 Microprocessor bit.
8 16 20 32
Data bus of 8088 Microprocessor bit.
8 16 20 32
In EX-OR Gate iftwo input lines high the output
Active High Active Low
Toggle None of these
Pentium IV Microprocessor is Bit.
16 64 32 128
DMA techniques use for data transfer.
High Speed Low Speed
Both a and b None of these
10) For selecting Minimum mode 8086 microprocessor pin 33
connected to
VCC VEE GND None of these
Page 1 of 2
SLR-US 9
11) Pin no. 40 in 8086 is
VCC GND
CLK RESET
12) 1001 Gray code of this
1101 1111
0101 None of these
13) D-cache stores
Instruction Data
Cycle None of these
14) is faster memory.
Primary Secondary
Cache None of these
Q.2 Answer the following (Any 14
Define Memory Hierarchy?
Convert Binary to Gray 101101?
Write pin function of ALE?
What is stack?
What is Multicore processor?
State difference between von-Neumann Harvard Architecture?
Write note on Excitation table?
Write difference between 8086 8088 Microprocessor?
Write note on USB?
Q.3 Attempt any two of the following: 10
Write down any four parameters in Memory?
Write note on Address Bus, DataBus control Bus?
Draw the circuit diagram of Half Adder and explain its
working?
Write difference between RISC CISC? 04
Q.4 Attempt any two of the following. 14
Explain any two mapping Techniques in Cache memory?
Draw explain any four Logic Gates?
Distinguish between Synchronous Asynchronous data
Transfer?
Q.5 Attempt any two of the following. 14
Draw internal architecture of 8086. Explain EU section in brief.
Define Virtual Memory? Explain Paging Segmentation?
Write a brief note on K Map?
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