State True or false with brief justification (if false).
A register access is faster than a memory access.

(ii) A bigger size of a program is due to multiple opcodes and operands in an instruction.

(iii) DMA allows the transfer of data directly between external devices.

(iv) The effective address in Based Indexed addressing mode is the sum of the contents of the base register, indexed register and displacement. An I/O interface is usually a register for either inputting data to or extracting data from the microprocessor.
Represent the number (55.6)10 as a floating point binary number with 24 bits. The normalized mantissa has 16 bits and the exponent has 8 bits. Assume suitable bias for the exponent.

(c) Perform the following arithmetic operations:
Add and in 8-bit register using signed complement notation. Also indicate overflow, if any.
Convert the hexadecimal number ABCD7 into binary and octal.

(iii) Represent decimal 567 into BCD. Simplify the following Boolean function using Karnaugh map:

F(A, 10, 11, 12, 15) Also draw the logic circuit fOr the simplified expression.

(e) Draw the logic diagram of a 2 x 4 decoder. Also, draw its truth table.

(f) The 8-bit registers R1, R2, R3 and R4 initially have the following values

R1 00001111
R2 11110000
R3 11001100
R4 10101010

Determine the 8-bit values in registers after the execution of the following sequence of micro-operations R1 R1 R2 Exclusive OR

(ii) R4 R1 -R3 Substract R3 from R1 A digital computer has a common bus system for 4 registers of 4 bits each. The bus is constructed with multiplexers.
How many selection inputs are there in each multiplexer?
What size of a multiplexer is needed?

(iii) How many multiplexers are there in the bus?

(h) What is the difference between COM and EXE programs?

(i) What is an Interrupt Vector Table Explain In the context of 8086 microprocessor.

2.(a) Using Hamming code, what should be the length of the error detection code that detects the error in one bit for 8 and 16-bit data respectively? How is execution of an instruction done? Illustrate through an example showing memory and register contents for execution of any instruction of your choice. Using a suitable example, explain the working of a two-way set associative cache mapping scheme.

(d) A memory has a capacity of 1024 x 8 bit. How many data input and data output lines does it have?

(ii) How many address lines does it have?

(iii) What is its capacity in bytes?

3.(a) How does DMA overcome shortcomings of interrupt driven and programmed I/O Draw the block diagram of a typical DMA controller. Brief1y explain its components.

(b) Draw various stages of an instruction pipeline. Explain the benefits of the same.

(c) Explain the following:

(i) Microinstruction

(ii) Stack

(iii) Control memory
INT 21h in 8086 microprocessor Buffer register

4.(a) A machine supports 32 operations and 16 addressing modes. The machine has 32 registers and the size of its main memory is 128 MB. Design a simple instruction format for the machine. Find out the physical addresses for the following segment register offsets for 8086 microprocessor: SS SP 6200h 0100h
(ii) DS BX 4300h 0200h
(iii) CS IP 5000h 1234h

(c) Discuss the following addressing modes with the help of one example for each:
Indirect addressing

(ii) Register indirect addressing

(iii) Relative addressing

(iv) Immediate addressing

5.(a) Write an assembly language program In 8086 microprocessor to find whether two numbers stored in memory are equal or not. Make suitable assumptions. Design and explain a logic circuit capable of adding three bits using half adders and appropriate logic gates.

(c) Write the code sequence in assembly language for performing the following operation

X=B C/D (E— What is the use of a large register file of RISC architecture? Explain with the help of an example/diagram.