bharat electronics limited announced job notification for the positions of deputy engineer in e-ii in the department of and in section of , . This job position deputy engineer in e-ii located in and in state central government. This job position is categorized as '' jobs.

The educational qualifications for this job position deputy engineer in e-ii specified as BE / B Tech in Electronics & Communications Engineering from any AICTE approved institution with First Class. Eligibility conditions for job position deputy engineer in e-ii mentioned as ESSENTIAL: a. Design and Development of High Speed Digital Hardware based on FPGAs, Microprocessor, DSP Processors & Microcontrollers with experience in Signal Integrity, Thermal & Power integrity analysis. b. Full Understanding of Digital design methodologies and tools including RTL coding in VHDL/Verilog, Simulation, Synthesis, Static timing analysis and Verification.Good knowledge on C/C++ Programming. and required experience levels for this job position deputy engineer in e-ii are as follows The candidate should have minimum working experience of 2 years as Embedded Engineer in Research Labs, Govt, PSUs, Reputed MNCs & Others. Apprenticeship training / on the Job training / Teaching experience will not be considered as work experience..

The salary or payscale for deputy engineer in e-ii is Rs. 40000-3%-140000/- In addition.

The total number of vacancies or positions are 6. Out of which for General/Un-Reserved/OC (Other Castes) vacancies are 0. For OBC (Other Backward Classes) total positions reserved are 0. For SC (Scheduled Castes) category job positions reserved are 0 and for ST (Scheduled Tribes) category job positions reserved are 0. For all other categories of reservations total positions alloted are .

The minimum and maximum age limits to apply for job deputy engineer in e-ii is minimum age limit is 0 and maximum age limit is 27.

The more and other important information related to this job specified as JOB DESCRIPTION: The job includes Digital & FPGA PCB designs, complete firmware development & Testing of PCBs, Sub Systems & integrated Level Testing.The post of Deputy Engineer in E-II Grade on short term basis for period of Five (05) Years.

Important dates to be remembered related to this notification are as follows.
Date of Issue of Notificaition : . Applications will be issued from date and last date to submit applications is . The admit cards will be issued from to . The Priliminary Examinations will start from and will lasts upto date of . The Preliminary Examinations Results will be announced on date . The Main Examinations will start from date and will ends on . The answer keys for mains examinations will be announced on . The results for Main Examinations will be declared or announced on date . Job Interviews for this job positions deputy engineer in e-ii will be held from date and will ends on date . The final results or shortlisted persons for this job deputy engineer in e-ii will be announced on .

This notification issued by which is located in city and in state .

For More Details related to this Notificaition, for Complete Job Details and for complete Notificaition, Please visit the official website of organization .

Voila!!! Happy Jobing.. :)

Job Organization / Department

• ministry of defence
• bharat electronics limited

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Job Positions

• deputy engineer in e-ii

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Job Educational Qualifications

• be / b tech in electronics & communications engineering from any aicte approved institution with first class

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Job Eligibility Details

• essential: a.
• design and development of high speed digital hardware based on fpgas, microprocessor, dsp processors & microcontrollers with experience in signal integrity, thermal & power integrity analysis. b.
• full understanding of digital design methodologies and tools including rtl coding in vhdl/verilog, simulation, synthesis, static timing analysis and verification.good knowledge on c/c++ programming.

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Job Experience Requirements

• the candidate should have minimum working experience of 2 years as embedded engineer in research labs, govt, psus, reputed mncs & others. apprenticeship training / on the job training / teaching experience will not be considered as work experience.

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Job City, State

• central government

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Job Total Vacancies

• 6

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Job Reservation Details

• General / Un-Reserved : 0
• OBC : 0
• SC : 0
• ST : 0
• Others :

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Job Payscale / Salary

• Rs. 40000-3%-140000/- In addition

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Job Age Details

• Minimum Age : 0
• Maximum Age : 27

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Job More Information

• job description: the job includes digital & fpga pcb designs, complete firmware development & testing of pcbs, sub systems & integrated level testing.the post of deputy engineer in e-ii grade on short term basis for period of five (05) years.

	Start Date	End Date
Applications		10-May-2018

• Organization :
• Organization City, State :
• Organization Website :