Indian Institute of Technology announced job notification for the positions of Lab Engineer in the department of Research and Development (R&D) and in section of , . This job position Lab Engineer located in Bhubaneswar and in state odisha. This job position is categorized as '' jobs.

The educational qualifications for this job position Lab Engineer specified as M.E/ M.Tech (Microelectronics/ VLSI/ Embedded system).. Eligibility conditions for job position Lab Engineer mentioned as and required experience levels for this job position Lab Engineer are as follows working knowledge in VLSI/ FPGA/ Embedded system tools..

The salary or payscale for Lab Engineer is Rs. 34,000/‐.

The total number of vacancies or positions are 1. Out of which for General/Un-Reserved/OC (Other Castes) vacancies are 0. For OBC (Other Backward Classes) total positions reserved are 0. For SC (Scheduled Castes) category job positions reserved are 0 and for ST (Scheduled Tribes) category job positions reserved are 0. For all other categories of reservations total positions alloted are .

The minimum and maximum age limits to apply for job Lab Engineer is minimum age limit is 0 and maximum age limit is 0.

The more and other important information related to this job specified as Name of the temporary research Project: Special Manpower Development Programme for CHIPS to System Design (SMDP‐C2SD). Name of the Sponsoring Agency : Department of Electronics and Information Technology (DeitY), Ministry of Communication and Information Technology. Job Responsibilities: The selected candidates for the above post will work on the following project tasks: Various aspects in research and development of VLSI/ SoC design activities under SMDP‐C2SD project. Hardware and VLSI software installation and maintenance. Linux/ Windows server and network administration. Conducting laboratory experiments and related research activities for UG/PG students. Duration of the Project : Up to May 2020. Date and Time of Interview : 9th July 2018 (Monday) at 9:30 AM. Venue of Interview : School of Electrical Sciences Building, Room No. 014, IIT Bhubaneswar, Argul, Jatni‐ 752050, Khurda, Odisha, India. Tel: +91‐0674‐257‐6032/6024 Email: office.rd@iitbbs.ac.in

Important dates to be remembered related to this notification are as follows.
Date of Issue of Notificaition : . Applications will be issued from date and last date to submit applications is . The admit cards will be issued from to . The Priliminary Examinations will start from and will lasts upto date of . The Preliminary Examinations Results will be announced on date . The Main Examinations will start from date and will ends on . The answer keys for mains examinations will be announced on . The results for Main Examinations will be declared or announced on date . Job Interviews for this job positions Lab Engineer will be held from date and will ends on date . The final results or shortlisted persons for this job Lab Engineer will be announced on .

This notification issued by which is located in city and in state .

For More Details related to this Notificaition, for Complete Job Details and for complete Notificaition, Please visit the official website of organization .

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Job Organization / Department

• indian institute of technology
• research and development (r&d)

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Job Positions

• Lab Engineer

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Job Educational Qualifications

• m.e/ m.tech (microelectronics/ vlsi/ embedded system).

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Job Eligibility Details

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Job Experience Requirements

• working knowledge in vlsi/ fpga/ embedded system tools.

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Job City, State

• Bhubaneswar, odisha

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Job Total Vacancies

• 1

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Job Reservation Details

• General / Un-Reserved : 0
• OBC : 0
• SC : 0
• ST : 0
• Others :

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Job Payscale / Salary

• Rs. 34,000/‐

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Job Age Details

• Minimum Age : 0
• Maximum Age : 0

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Job More Information

• name of the temporary research project: special manpower development programme for chips to system design (smdp‐c2sd). name of the sponsoring agency : department of electronics and information technology (deity), ministry of communication and information technology. job responsibilities: the selected candidates for the above post will work on the following project tasks: various aspects in research and development of vlsi/ soc design activities under smdp‐c2sd project. hardware and vlsi software installation and maintenance. linux/ windows server and network administration. conducting laboratory experiments and related research activities for ug/pg students. duration of the project : up to may 2020. date and time of interview : 9th july 2018 (monday) at 9:30 am. venue of interview : school of electrical sciences building, room no. 014, iit bhubaneswar, argul, jatni‐ 752050, khurda, odisha, india. tel: +91‐0674‐257‐6032/6024 email: office.rd@iitbbs.ac.in

	Start Date	End Date
Notification Issued		21-Jun-2018
Interviews		09-Jul-2018

• Organization :
• Organization City, State :
• Organization Website :