Master of Science II (Material Science) Examination: Oct/Nov
2016 Semester IV (Old CGPA)
SLR No. Day
Date Time Subject Name Paper
No. Seat No.
SLR SH
565
Saturday
19/11/2016
2:30 P.M
to
5:00 P.M
Microelectronics
C
XIV
Instructions: Q.No.1 and 2 are compulsory.
Answer any three questions from Q.No.3 to Q.No.7.
Figures to the right indicates full marks.
Use of log table/calculator (non programmable) is allowed.
Total Marks: 70
Q.1 Choose the correct alternative: 14
The disadvantages of pre junction isolation is
smaller isolation time effective diffusion
paracitic capacitance breaking of the junction
Etch attacks are preferentially faster on a orienterd Si.

<>1010
Burried layer the collector resistance.
decreases increases
does not affect both increase and decreases
Which isolation is better for fabrication of
pn junction dielectric
pp junction nn junction
Very stable high resistances are fabricated by a
trimming diffusion
Laser trimming epitaxy
The length of a zone in a Zone process is typically cm.
1 cm 1.5 cm
0.15 cm 15 cm
The effective impurity concentration for a reliable diffusion of Boron in
Silicon is of the order
1023 atoms/cm3 1019 atoms/cm3
1021 atoms/cm3 1025 atoms/cm3
In the projected range, impurity distribution profile follows
behavior.
Gaussian erf.C
linear logarithmic
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The base of a normal transistor is thick.
0.6 to 0.8 0.06 to 0.08
1 to 6 6 to 8
10) 1 mil inch.
10 10
10 4 10 5
11) In die attachment, usually soldesing of the soft type is used.
Pb Sn, Pb
Pb Cd, Pb Mg
12) High frequency devices can be fabricated using bonder.
Wedge Ball
Stitch tweezer
13) is a popularly used negative photoresist.
KPR Novolac
Isofine 820 Isopoly K 747 MR
14) The aspect ratio is
L⁄W W⁄L
R⁄L L⁄R
Q.2 Attempt any 3 of the following. 14
What is an etch back effect?
What is a projected range?
Write a note on metallization?
Zone process.
Q.3 Give a brief account of substitutional and interstitial diffusions. 10
What is a negative photoresist? 04
Q.4 Discuss how an integrated bipolar n pn transistor is fabricated by a planner
process.
10
Define the term epitaxy. 04
Q.5 Discuss in brief an ion implantation process. 10
What is zone leveling? 04
Q.6 How are the monolithic planar diodes fabricated? Give a suitable diode
configuration for high voltage and high speed applications.
12
What is a TO5 package? 02
Q.7 What is an epitaxy? Explain growth of an epilayer from vapow phase
epitaxy.
10
Write a note on complete oxide isolation. 04
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